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Please use this identifier to cite or link to this item: http://dx.doi.org/10.25673/5882
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dc.contributor.authorEfnusheva, Danijela
dc.contributor.authorTentov, Aristotel
dc.contributor.authorCholakoska, Ana
dc.contributor.authorKalendar, Marija
dc.contributor.editorSiemens, Eduard
dc.contributor.editorKrause, Bernd
dc.contributor.editorMylnikov, Leonid
dc.date.accessioned2018-09-24T18:28:23Z-
dc.date.available2018-09-24T18:28:23Z-
dc.identifier.urihttps://opendata.uni-halle.de//handle/1981185920/12693-
dc.identifier.urihttp://dx.doi.org/10.25673/5882-
dc.language.isoeng-
dc.publisherBibliothek, Hochschule Anhalt
dc.relation.ispartofTitel: Proceedings of the 5th International Conference on Applied Innovations in IT, Volume Nr. 5
dc.relation.haspartTitel: Proceedings of the 5th International Conference on Applied Innovations in IT, Volume Nr. 5
dc.subject.ddc004-
dc.titleFPGA Implementation of IP Packet Header Parsing Hardware
dcterms.typeHochschulschrift
dc.typeBook
dc.identifier.urnurn:nbn:de:gbv:kt1-2578
local.openaccesstrue-
Appears in Collections:Elektrotechnik, Maschinenbau und Wirtschaftsingenieurwesen

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